镜像站点 · 本页由第三方 GitHub 只读镜像提供,非 GitHub 官方站点,不接受任何登录或凭据输入。前往 github.com
Skip to content

Adds aarch64 prefetching into diskann-vector and diskann-inmem - #1408

Merged
Mark Hildebrand (hildebrandmw) merged 6 commits into
microsoft:mainfrom
pfoxARM:private/pfoxARM/aarch64_prefetch
Oct 20, 2026
Merged

Mark Hildebrand (hildebrandmw) merged 6 commits into
microsoft:mainfrom
pfoxARM:private/pfoxARM/aarch64_prefetch

Conversation

@pfoxARM

@pfoxARM pfoxARM commented Sep 16, 2026

Copy link
Copy Markdown
Contributor

What does this implement/fix?

Adds prefetching into diskann-vector and diskann-inmem for aarch64 using prfm pldl1keep, [{ptr}]

Any other comments?

I did test both prfm pldl1keep, [{ptr}] and prfm pldl1strm, [{ptr}] (Streaming or non-temporal L1 prefetch) on C100 VM and saw l1keep was marginally better. Although it'd be nice to compare on C200
But l1keep is also closer to the other architecture paths that already exist.

More info on prfm here https://support.arm.com/documentation/ddi0602/2024-06/Base-Instructions/PRFM--immediate---Prefetch-memory--immediate--?lang=en

@pfoxARM
pfoxARM requested review from a team and a lite review from Copilot September 16, 2026 18:33

Copilot AI left a comment

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

🟢 Approval recommended

No unresolved review issues were identified.

Pull request overview

Adds AArch64 L1 prefetch support to diskann-vector and diskann-inmem using prfm pldl1keep.

Changes:

  • Adds AArch64 vector prefetch helpers.
  • Adds AArch64 raw-memory prefetching with fallback behavior.
File summaries
File Description
diskann-vector/src/lib.rs Adds AArch64 vector prefetch helpers.
diskann-inmem/src/prefetch.rs Adds AArch64 cache-line prefetching.
Review details
  • Files reviewed: 2/2 changed files
  • Comments generated: 0
  • Review effort level: Lite

💡 Add a code-review agent skill or configure MCP servers for context-aware, tailored reviews. Learn more in the docs.

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thanks - one small maintenance ask on my side.

Did you observe much of a performance difference when prefetching was enabled?

Comment thread diskann-inmem/src/prefetch.rs Resolved
@pfoxARM

pfoxARM commented Sep 18, 2026 •

Copy link
Copy Markdown
Contributor Author

Thanks - one small maintenance ask on my side.

Did you observe much of a performance difference when prefetching was enabled?

Using C100 and C200 16-thread VMs and looking at 8-thread results:

Comparing QPS diff against main = cdaf3b4 (16th September)

  • C100, exhaustive u8x2:
    -- l1keep -0.31%, l2keep -0.25%.

  • C100, exhaustive u8x4:
    -- l1keep +0.67% , l2keep -0.77% .

  • C100, spherical u2:
    -- l1keep +60.21%, l2keep +72.88%.

  • C100, spherical u4:
    -- l1keep +23.34%, l2keep +20.69%.

  • C200, exhaustive u8x2:
    -- l1keep -7.02%, l2keep +1.92%.

  • C200, exhaustive u8x4:
    -- l1keep +6.93%, l2keep +5.13%.

  • C200, graph u2:
    -- l1keep +45.62%, l2keep +50.98%.

  • C200, graph u4:
    -- l1keep +32.91%, l2keep +9.29%.

I also looked at Keep vs Streamed (non-temporal) prefetch for L1 and L2 on int8 * int8, but saw mixed marginal gains/loss on C100 and C200.

I'll keep looking into this for now, check out cache PMU metrics to see how aggressive it's being.

@pfoxARM

pfoxARM commented Oct 2, 2026

Copy link
Copy Markdown
Contributor Author

I think we should go with L2keep for aarch64, we see improved search performance on C100 and C200 for this across many kernels.

Kernel Variant Backend stall IPC L2 miss
f32xf32 inner prod main / L1 / L2 72.5% / 72.0% / 71.5% 0.88 / 0.93 / 0.95 45.7% / 38.5% / 32.2%
int8xint8 inner prod main / L1 / L2 78.0% / 73.3% / 63.3% 1.08 / 1.42 / 2.02 74.7% / 57.4% / 10.6%
u2xu2 inner prod (scalar quant) main / L1 / L2 58.8% / 43.0% / 39.9% 1.89 / 2.63 / 2.76 49.4% / 30.4% / 12.4%

L2KEEP gives the strongest PMU improvement, especially for int8/u2: much lower L2 miss rates, fewer backend stalls, and higher IPC.

@pfoxARM
pfoxARM force-pushed the private/pfoxARM/aarch64_prefetch branch from 3ac6e4e to 4c4f9d9 Compare October 12, 2026 13:34
@pfoxARM

pfoxARM commented Oct 12, 2026

Copy link
Copy Markdown
Contributor Author

Refactored prefetching now in the latest commit, sorry for the force push.

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thanks Patrick! One more small ask - otherwise looks good to me!

Comment thread diskann-vector/src/lib.rs Resolved
@codecov-commenter

Codecov Comments Bot (codecov-commenter) commented Oct 14, 2026 •

Copy link
Copy Markdown

Codecov Report

❌ Patch coverage is 38.70968% with 19 lines in your changes missing coverage. Please review.
✅ Project coverage is 91.08%. Comparing base (177c03b) to head (48c987d).
⚠️ Report is 17 commits behind head on main.

Files with missing lines Patch % Lines
diskann-vector/src/lib.rs 34.48% 19 Missing ⚠️

❌ Your patch status has failed because the patch coverage (38.70%) is below the target coverage (90.00%). You can increase the patch coverage or adjust the target coverage.

Additional details and impacted files

Impacted file tree graph

@@            Coverage Diff             @@
##             main    #1408      +/-   ##
==========================================
+ Coverage   90.95%   91.08%   +0.13%     
==========================================
  Files         586      590       +4     
  Lines      118173   121495    +3322     
==========================================
+ Hits       107483   110667    +3184     
- Misses      10690    10828     +138     
Flag Coverage Δ
miri 91.08% <38.70%> (+0.13%) ⬆️
unittests 90.79% <38.70%> (+0.14%) ⬆️

Flags with carried forward coverage won't be shown. Click here to find out more.

Files with missing lines Coverage Δ
diskann-inmem/src/prefetch.rs 95.78% <100.00%> (ø)
diskann-vector/src/lib.rs 38.70% <34.48%> (-5.74%) ⬇️

... and 46 files with indirect coverage changes

🚀 New features to boost your workflow:
  • ❄️ Test Analytics: Detect flaky tests, report on failures, and find test suite problems.

@pfoxARM
pfoxARM force-pushed the private/pfoxARM/aarch64_prefetch branch from bfabfae to 6823365 Compare October 15, 2026 17:25
Comment thread diskann-vector/src/lib.rs Resolved

Copilot AI left a comment

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

🟡 Changes recommended

diskann-vector/src/lib.rs emits pldl2keep instead of the specified pldl1keep instruction.

1 open issue

Review effort: Lite

Comment thread diskann-vector/src/lib.rs Resolved
@hildebrandmw
Mark Hildebrand (hildebrandmw) merged commit 79c5fcf into microsoft:main Oct 20, 2026
31 checks passed
Mark Hildebrand (hildebrandmw) added a commit that referenced this pull request Oct 26, 2026
# DiskANN v0.61.0

## Highlights

- **Quantization:** Added 3-bit spherical quantization with AVX2
acceleration, faster
  spherical encoding, and NEON float32 MinMax kernels.
- **In-memory indexing (experimental):** Added product quantization and
1-8-bit scalar
quantization, unified quantized representations, and AArch64
prefetching.
- **Multi-vector search:** Added `i8 x i8` and MinMax8 x MinMax4 MaxSim
kernels.
- **Fixes:** Preserve virtual start-point out-edges when writing disk
indexes, correctly
round-trip scalar quantization configurations without standard
deviation, and support
  zero-column mutable matrix iterators.

## Breaking changes and upgrading

Changes are concentrated in quantization APIs and experimental/tooling
crates.

* PQ training (#1467) - Training now returns `BasicTable`.
`SimplePivots` was removed.
Replace `flatten()` with `view_pivots().as_slice()` and use
`pivots_for(chunk)` for
  per-chunk access.
* PQ distance tables (#1458) - Change `ProcessInto` bounds to
`ProcessInto<f32>` and calls
from `process_into::<Metric>(...)` to `process_into::<Metric,
f32>(...)`.
* MaxSim kernels (#1429) - Generic kernel/erasure code now requires `T:
MaxSimElement` and
score buffers of `T::Score` (`f32` for floats, `i32` for `i8`). Update
`build_max_sim`
  error handling from `NotSupported` to `BuildMaxSimError`.
* `diskann-inmem` (#1485) - Replace `repr::Spherical` with
`repr::Quantized`. Wrap the
quantizer in `repr::quantized::spherical::Spherical::new(...)` when
configuring it.
  Configuration and `Rerank` types now live under `repr::quantized`.
* `diskann-benchmark-runner` (#1475) - `input::Registered` and public
`Registry::input` were
removed. Use the concrete `Input` implementation's `tag()` and
`example()` methods instead.

## All Changes
* Fix serialization round trip for QuantizationType::SQ without standard
deviation by @arrayka in #1461
* i8 x i8 MaxSim Kernels by @suri-kumkaran in
#1429
* Adding `subview_mut` to `MatrixMut` by @arkrishn94 in
#1463
* Add InsertResult::SuccessUpdate by @metajack in
#1449
* [diskann-quantization] PQ Infrastructure for `diskann-inmem` by
@hildebrandmw in #1458
* [diskann-quantization] Teach PQ training to return a `BasicTable`. by
@hildebrandmw in #1467
* [deps] Run `cargo-update` by @hildebrandmw in
#1452
* Support zero-column mutable matrix iterators by @arrayka in
#1462
* [diskann-quantization] Use `f32::NAN` instead of `core::f32::NAN`. by
@hildebrandmw in #1471
* [diskann-wide] Add `V4::new_checked_miri_uncached`. by @hildebrandmw
in #1480
* [diskann-wide] Add maddubs intrinsic wrappers to V3 and V4 by
@partychen in #1479
* Bump the github-actions group across 1 directory with 5 updates by
@dependabot[bot] in #1482
* [benchmark-runner] Simplify Input representation by @hildebrandmw in
#1475
* [diskann-quantization] Optimize spherical encoding scale search by
@xinyuwen2 in #1478
* [diskann-garnet] Implement XVCREATE, XVIMPORT by @metajack in
#1455
* [diskann-garnet] Support configurable start points and allow importing
start points by @metajack in
#1464
* [diskann-garnet] Add spherical 2-bit and 4-bit quantization by
@metajack in #1465
* [deps] Address depandabot issue 32 by @hildebrandmw in
#1496
* [diskann-disk] Preserve virtual start point out-edges when writing the
disk index by @doliawu in #1483
* [diskann-quantization] Add Neon F32 Minmax Kernels by @pfoxARM in
#1431
* [diskann-garnet] Add macOS arm64 support to NuGet publishing by
@metajack in #1495
* [diskann-disk] Require start points at index initialization. by
@hildebrandmw in #1497
* Expose metric-aware quantizer centroid distance by @cherryrhea in
#1395
* [diskann-inmem] Add support for Product Quantization by @hildebrandmw
in #1469
* Adds aarch64 prefetching into diskann-vector and diskann-inmem by
@pfoxARM in #1408
* [diskann-inmem] Add scalar quantization by @hildebrandmw in
#1484
* Bump the github-actions group with 3 updates by @dependabot[bot] in
#1505
* [diskann-inmem] Spherical Quantization Round 2 by @hildebrandmw in
#1485
* [diskann-quantization] Add SphericalQ 3-bit support and AVX2 kernel by
@xinyuwen2 in #1474
* [muilt-vetor] Add standalone MinMax8 x MinMax4 MaxSim kernel by
@partychen in #1494

## New Contributors
* @cherryrhea made their first contribution in
#1395

**Full Changelog**:
v0.60.0...v0.61.0

Co-authored-by: Mark Hildebrand <mhildebrand@microsoft.com>
Suhas Jayaram Subramanya (suhasjs) pushed a commit that referenced this pull request Nov 3, 2026
#### What does this implement/fix?
Adds prefetching into diskann-vector and diskann-inmem for aarch64 using
`prfm pldl1keep, [{ptr}]`

#### Any other comments?
I did test both `prfm pldl1keep, [{ptr}]` and `prfm pldl1strm, [{ptr}]`
(Streaming or non-temporal L1 prefetch) on C100 VM and saw l1keep was
marginally better. Although it'd be nice to compare on C200
But `l1keep` is also closer to the other architecture paths that already
exist.

More info on `prfm` here
https://support.arm.com/documentation/ddi0602/2024-06/Base-Instructions/PRFM--immediate---Prefetch-memory--immediate--?lang=en
Suhas Jayaram Subramanya (suhasjs) pushed a commit that referenced this pull request Nov 3, 2026
# DiskANN v0.61.0

## Highlights

- **Quantization:** Added 3-bit spherical quantization with AVX2
acceleration, faster
  spherical encoding, and NEON float32 MinMax kernels.
- **In-memory indexing (experimental):** Added product quantization and
1-8-bit scalar
quantization, unified quantized representations, and AArch64
prefetching.
- **Multi-vector search:** Added `i8 x i8` and MinMax8 x MinMax4 MaxSim
kernels.
- **Fixes:** Preserve virtual start-point out-edges when writing disk
indexes, correctly
round-trip scalar quantization configurations without standard
deviation, and support
  zero-column mutable matrix iterators.

## Breaking changes and upgrading

Changes are concentrated in quantization APIs and experimental/tooling
crates.

* PQ training (#1467) - Training now returns `BasicTable`.
`SimplePivots` was removed.
Replace `flatten()` with `view_pivots().as_slice()` and use
`pivots_for(chunk)` for
  per-chunk access.
* PQ distance tables (#1458) - Change `ProcessInto` bounds to
`ProcessInto<f32>` and calls
from `process_into::<Metric>(...)` to `process_into::<Metric,
f32>(...)`.
* MaxSim kernels (#1429) - Generic kernel/erasure code now requires `T:
MaxSimElement` and
score buffers of `T::Score` (`f32` for floats, `i32` for `i8`). Update
`build_max_sim`
  error handling from `NotSupported` to `BuildMaxSimError`.
* `diskann-inmem` (#1485) - Replace `repr::Spherical` with
`repr::Quantized`. Wrap the
quantizer in `repr::quantized::spherical::Spherical::new(...)` when
configuring it.
  Configuration and `Rerank` types now live under `repr::quantized`.
* `diskann-benchmark-runner` (#1475) - `input::Registered` and public
`Registry::input` were
removed. Use the concrete `Input` implementation's `tag()` and
`example()` methods instead.

## All Changes
* Fix serialization round trip for QuantizationType::SQ without standard
deviation by @arrayka in #1461
* i8 x i8 MaxSim Kernels by @suri-kumkaran in
#1429
* Adding `subview_mut` to `MatrixMut` by @arkrishn94 in
#1463
* Add InsertResult::SuccessUpdate by @metajack in
#1449
* [diskann-quantization] PQ Infrastructure for `diskann-inmem` by
@hildebrandmw in #1458
* [diskann-quantization] Teach PQ training to return a `BasicTable`. by
@hildebrandmw in #1467
* [deps] Run `cargo-update` by @hildebrandmw in
#1452
* Support zero-column mutable matrix iterators by @arrayka in
#1462
* [diskann-quantization] Use `f32::NAN` instead of `core::f32::NAN`. by
@hildebrandmw in #1471
* [diskann-wide] Add `V4::new_checked_miri_uncached`. by @hildebrandmw
in #1480
* [diskann-wide] Add maddubs intrinsic wrappers to V3 and V4 by
@partychen in #1479
* Bump the github-actions group across 1 directory with 5 updates by
@dependabot[bot] in #1482
* [benchmark-runner] Simplify Input representation by @hildebrandmw in
#1475
* [diskann-quantization] Optimize spherical encoding scale search by
@xinyuwen2 in #1478
* [diskann-garnet] Implement XVCREATE, XVIMPORT by @metajack in
#1455
* [diskann-garnet] Support configurable start points and allow importing
start points by @metajack in
#1464
* [diskann-garnet] Add spherical 2-bit and 4-bit quantization by
@metajack in #1465
* [deps] Address depandabot issue 32 by @hildebrandmw in
#1496
* [diskann-disk] Preserve virtual start point out-edges when writing the
disk index by @doliawu in #1483
* [diskann-quantization] Add Neon F32 Minmax Kernels by @pfoxARM in
#1431
* [diskann-garnet] Add macOS arm64 support to NuGet publishing by
@metajack in #1495
* [diskann-disk] Require start points at index initialization. by
@hildebrandmw in #1497
* Expose metric-aware quantizer centroid distance by @cherryrhea in
#1395
* [diskann-inmem] Add support for Product Quantization by @hildebrandmw
in #1469
* Adds aarch64 prefetching into diskann-vector and diskann-inmem by
@pfoxARM in #1408
* [diskann-inmem] Add scalar quantization by @hildebrandmw in
#1484
* Bump the github-actions group with 3 updates by @dependabot[bot] in
#1505
* [diskann-inmem] Spherical Quantization Round 2 by @hildebrandmw in
#1485
* [diskann-quantization] Add SphericalQ 3-bit support and AVX2 kernel by
@xinyuwen2 in #1474
* [muilt-vetor] Add standalone MinMax8 x MinMax4 MaxSim kernel by
@partychen in #1494

## New Contributors
* @cherryrhea made their first contribution in
#1395

**Full Changelog**:
v0.60.0...v0.61.0

Co-authored-by: Mark Hildebrand <mhildebrand@microsoft.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

5 participants